Siemens Accelerated AI Chip Verification to Trillions of Cycles with NVIDIA Technology

[Cengiz Özemli]

Siemens, in collaboration with NVIDIA, has achieved the previously impossible feat of capturing trillions of cycles in just a few days during the verification process of artificial intelligence (AI) chips. This significant advancement was made possible by the Veloce proFPGA CS hardware-assisted verification system.

### Design Optimization with Advanced Verification

The strategic partnership between Siemens and NVIDIA combines Siemens' flexible and high-performance Veloce proFPGA CS hardware architecture with NVIDIA's optimized chip design, enabling rapid execution of intensive verification cycles. This allows designers to run trillions of verification cycles before the initial silicon production phase, resulting in much more optimized and reliable designs.

Jean-Marie Brunet, Senior Vice President of Siemens Digital Industries Software, states that this collaboration has advanced hardware-assisted methods and FPGA-based prototyping to meet the verification needs of complex AI and machine learning SoCs. Veloce proFPGA CS offers optimized solutions for both single FPGA-based IP verification and multi-billion-gate chiplet designs.

Narendra Konda from NVIDIA Hardware Engineering emphasizes that in the face of increasing complexity in AI and computer architectures, chip development teams require high-performance verification solutions. He notes that with Siemens technology, these cycles can be captured trillions of times within days, ensuring the reliability of next-generation AI products.

### FPGA-Based Prototyping and Verification

FPGA-based prototyping systems can perform pre-silicon verification workloads much faster than simulation or emulation methods. However, today's AI/ML designs demand even more challenging verification processes due to both chip and software complexity.

The ability to process trillions of cycles in a short time is critical for achieving time-to-market and reliability goals. Traditional simulation and emulation methods are insufficient to complete even a few billion cycles within a practical timeframe.

### Siemens Veloce proFPGA CS Features

• Hardware-assisted high-performance verification system
• Scalable and flexible hardware architecture
• Capacity to capture trillions of verification cycles in days
• Advanced and user-friendly application and debugging software flow
• Wide range of use, from single FPGA IP verification to multi-billion-gate chiplet designs

This solution developed by Siemens and NVIDIA significantly accelerates the verification process in the development of AI chips, supporting the industry in delivering reliable and innovative products.